Digital VLSI chip design with Cadence and Synopsys CAD tools /
Brunvand, Erik,
Digital VLSI chip design with Cadence and Synopsys CAD tools / Erik Brunvand. - xvi, 571 páginas : ilustraciones ; 24 cm.
Inluye bibliografía (p. [565]-566).
Introduction -- Cadence DFII and ICFB -- Composer schematic capture -- Verilog simulation -- Virtuoso layout editor -- Standard cell design template -- Spectre analog simulator -- Cell characterization -- Verilog synthesis -- Abstract generation -- SOC encounter place and route -- Chip assembly -- Design example -- Appendix A: Tool and setup scripts -- Appendix B: Scripts to drive the tools -- Appendix C: Technology and cell libraries.
0321547993 9780321547996
Circuitos integrados.
621.3815 / B911d 2010
Digital VLSI chip design with Cadence and Synopsys CAD tools / Erik Brunvand. - xvi, 571 páginas : ilustraciones ; 24 cm.
Inluye bibliografía (p. [565]-566).
Introduction -- Cadence DFII and ICFB -- Composer schematic capture -- Verilog simulation -- Virtuoso layout editor -- Standard cell design template -- Spectre analog simulator -- Cell characterization -- Verilog synthesis -- Abstract generation -- SOC encounter place and route -- Chip assembly -- Design example -- Appendix A: Tool and setup scripts -- Appendix B: Scripts to drive the tools -- Appendix C: Technology and cell libraries.
0321547993 9780321547996
Circuitos integrados.
621.3815 / B911d 2010