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_aDLC _cDLC _dUN@ |
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_a004.358 _bD666 2004 |
| 245 | 1 | 0 |
_aDomain-specific processors : _bsystems, architectures, modeling, and simulation / _cShuvra Bhattacharyya, Ed Deprettere y Jürgen Teich, eds. |
| 264 | 3 | 1 |
_aNew York : _bMarcel Dekker, _cc2004. |
| 300 |
_axv, 261 páginas : _bilustraciones |
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| 336 |
_atexto _btxt _2rdacontent |
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| 337 |
_ano mediado _bn _2rdamedia |
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| 338 |
_avolumen _bnc _2rdacarrier |
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| 490 | 0 |
_aSignal processing and communications ; _v20 |
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| 504 | _aIncluye bibliografía. | ||
| 650 | 1 | 4 |
_99833 _aMultiprocesadores. |
| 650 | 1 | 4 |
_9133036 _aMultiprogramación (computadores electrónicos). |
| 700 | 1 |
_9132599 _aBhattacharyya, Shuvra S., _eeditor |
|
| 700 | 1 |
_9133037 _aDeprettere, Ed. F., _eeditor |
|
| 700 | 1 |
_9133038 _aTeich, Jürgen., _eeditor |
|
| 856 |
_a_ _yTabla de contenido _uhttp://www.loc.gov/catdir/toc/fy043/2003056921.html |
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